A system is described in the publication "Journal of the Society of Motion Picture and Television Engineers" June 1973, Volume 82, pages 482-491 in which a binary coded signal indicative of each position of a video tape is recorded in a longitudinal track of the tape. The signal consists of a pulse sequence of 80 bit data words and contains time data in the form of hour, minute, second, and frame number as well as synchronization information. The time data takes up the first 64 bits while the synchronization portion requires the remaining 16 bits. The signal is coded in a bi-phase-mark code which is a self-timing code in worldwide use and which has been elevated to a standard by the European Broadcast Union in E.B.U. Technical Document 3097. In this code a logic "0" is indicated by a level change at the end of the bit, while a logic "1" is represented by an additional level change in the middle of the bit cell. Depending on the information content, such an 80 bit word may have different instantaneous levels in any one specified place, for example in the middle or at the end of the word. When sequencing two signals to be recorded onto the longitudinal track of the video tape, it is necessary that the data portions are recorded continuously and without error. For this purpose a code reader must be provided which reads the data portion at the end of the previous recording, recognizes this portion and phase synchronizes the timing code generator required for generating the data signals. Under these circumstances the transition from the readout to the recorded signal can take place anywhere within the 80 bit word.
In tight sequencing of two phase-shifted signal trains, either too many or too few bits may appear in the sequenced signal or undesired amplitude changes can result during the sequencing which decrease or totally prevent the possibility of a true evaluation of the sequenced signals.
An error recognition system is described in DE-PS 25 03 296 in which advantage is taken of the fact that within the 64 bit data portion of each word certain bits are always unoccupied and therefore will have the same value within each 80 bit word. The system contains an AND gate which receives a first signal when the synchronization portions of the two signals are in coincidence and a second signal upon coincidence of the unoccupied data bits. Only signals which have been tested for coincidence twice in this manner are used for evaluation. However, this error recognition system depends upon the presence of unoccupied data bits. This is undesirable in that these bits may be required for use at some other time.